1. Field of the Invention
The present invention relates to the field of digital circuits; more specifically, it relates to monotonic complimentary metal-oxide-silicon (CMOS) digital circuits and a method of controlling leakage current in monotonic CMOS logic circuits.
2. Background of the Invention
An increasing concern in advanced digital circuit design is the control of leakage current, especially when the digital logic circuit is in the precharge or standby state, which is often the predominant state in terms of the amount of time that the circuit is in that state compared to other states of the circuit. High leakage current can result in reduced device operating time in the case of battery operated devices. Therefore, there is a need for reduced leakage current circuits and method for reducing leakage current in digital CMOS logic circuits.